A resistor-capacitor (RC) circuit is a fundamental analog design component. The product of the resistance and capacitance for the RC circuit defines a time constant τ that defines the behavior of the RC circuit. For example, the cut-off frequency for an RC circuit used as either a low-pass filter or a high-pass filter is ½πτ. Since the time constant τ is such an important parameter in analog filter or delay line design, it is important that the resistance and the capacitance used to form the RC circuit have the proper values. But these resistance and capacitance values depend upon the process used to form the corresponding resistor and capacitor. The resistor and capacitor for an RC circuit may be formed using one or more metal layers for an integrated circuit. These metal layers are separated from the transistors in the semiconductor die by insulating dielectric layers.
To form a metal-layer resistor, a metal layer is patterned to form one or more conductors. The resulting resistance depends upon the width and length of the conductors or leads forming the resistor. The depth or thickness of the metal layer is determined by the semiconductor manufacturing process so a designer may tune the resistance by increasing the length or width of the leads forming the resistor. Increasing the width lowers the resistance whereas increasing the length increases the resistance. Although such design techniques are well known, the masking and processing steps are prone to process variations that cause errors in the actual resistance as compared to the desired resistance. Similar process variations apply to polysilicon resistors. A common rule of thumb for such resistance variation for polysilicon resistors is that the actual resistance will be within +/−20% of the desired resistance. For example, if the mask layout was designed to form a resistor with a resistance of 10 KΩ, the actual resistance for the resulting resistor will range from 8 K to 12 KΩ.
A similar process variation affects the capacitance for a metal layer capacitor. As opposed to a metal-insulator-metal (MIM) capacitor in which one electrode is formed in a first metal layer and a second electrode is formed in an adjacent metal layer, a metal layer capacitor is formed in the one metal layer. A metal layer capacitor may also be denoted as a metal-oxide-metal (MOM) capacitor as known in the semiconductor arts. The capacitance for a metal layer capacitor depends upon the separation between the leads forming the capacitor electrodes and their length. A designer may thus adjust the separation and length to achieve the desired capacitance. But the masking and processing steps to form the capacitor electrodes are also subject to process variation. A common rule of thumb for the resulting process variation in the capacitance is +/−20%. An RC circuit formed from a metal layer resistor and a metal layer capacitor will thus have a relatively large time constant variation. Circuit performance suffers from such a wide range in achieved time constants for metal layer RC circuits.
Accordingly, there is a need in the art for process-invariant metal layer RC circuits.